Development Builds
Development Builds are the current builds based off the source at github. This allows you to use the latest changes straight away, tho these changes may not be fully tested and have issues.
Version
Build Dates
Downloads
Changes
Dev-4.0.0-6566-fbbf7c7
1st May 2025
- RSP: get it to use asm jit lite (commit: fbbf7c7837e203db6ef4a1e1c982514c08e6cc96)
Dev-4.0.0-6565-6ba97eb
24th April 2025
- Start to add AsmJitLite (commit: 6ba97eb4eba0d8f347461501e3a79caeb0c6df10)
Dev-4.0.0-6564-2c20602
17th April 2025
- RSP: Fix up profiling tasks (commit: 2c2060248d340ef6a56631c2475a1653a9bd63f7)
Dev-4.0.0-6563-8c751cc
11th April 2025
- rsp: fix up the code so it compiles on x86 (commit: 8c751cc22f147f4b6c94192fe15b3ef6675a5f81)
Dev-4.0.0-6562-14f033b
11th April 2025
- RSP: Rename log x86 to log asm (commit: df883161c0d4955df4ef9684488c484c0d139315)
- Rsp: Start to work on x64 compiling tasks (commit: 14f033bce46ed0c97cc87101b2539eb20c9ab410)
Dev-4.0.0-6560-7d24088
28th March 2025
- RSP: Rename RspRecompilerCPU to RspRecompilerCPU-x86 (commit: 0c0a46c1e0758264a7ea35b580fad5f4b850323a)
- RSP: Move IsBranch into RSPInstruction (commit: 1a83c9b120fa6f0aacf50741addf45abd43af3ba)
- RSP: move isNop into RSPInstruction (commit: 7d24088e8a4b319427464e1a29874e533859ab8f)
Dev-4.0.0-6557-5e89701
13th March 2025
- RSP: Remove recompiler from x64, and remove hle tasks from x86 (commit: 5e89701fdf1d57062b179b9bd004e18e22280291)
Dev-4.0.0-6556-1edb5de
27th February 2025
- Core: have CRecompiler::RecompilerMain_VirtualTable handle PC as 32bit and clean up recompiler memory reset (commit: 1edb5debdf69d1f5c49cdf7adfbef592cfdb0cf2)
Dev-4.0.0-6555-9034bc6
21st February 2025
- Clean up Windows Start Menu entry (#2465) Cleans up the Windows Start Menu entry for the Windows installer. Having an uninstall shortcut is obsolete and an unclean practice in Windows 10 . Same for support. This change makes Project64 directly appear on the Start Menu, not requiring further clicks to expand and making the appearance clean. (commit: e2e1766c8257b35c72420001abd3d38097213b40)
- Remove unused cheat context menu entries (#2463) (commit: c7f758bbd338ac7d3baa61ea0d287980f5861d14)
- Improve alignment of UI elements (#2462) (commit: 32910e22814d0313e478940731d4f38fb7e35def)
- Various Widescreen Enhancement Codes (#2459) * Add 21:9 Ultrawide Enhancement for Banjo-Kazooie. * Add Diddy Kong Racing, Mario Kart 64 and Super Mario 64. (commit: 59cdea9db9ff15a7890daa58c97c1415692e7e65)
- Updated Swedish translation (#2458) * Update Swedish.pj.Lang * Update Swedish.pj.Lang (commit: 1342196edde52221bcc96543bb014a381fe3b903)
- CIC improvements (#2455) * Add CIC CRCs for iQue Player games * Give proper name to 64DD IPL US CIC (commit: 70c44965b0ee3d6fea0d1a7e44ec4324d51b543e)
- Upgrade zlib to version 1.3.1 (#2448) (commit: 23ff3d90427535cf85705dc3196aabb5e2fe7c86)
- Fix: NRage plugin gets stuck in initialization in certain cases (#2464) * Fix: NRage plugin gets stuck in initialization in certain cases The function wscanf was incorrectly used to parse VID_ and PID_ values from a string, causing failures in device detection. wscanf expects input from stdin, whereas in this case, the device ID string is stored in memory. Using swscanf ensures correct parsing from memory instead of waiting for stdin This fixes the issue where XInput devices not being detected properly at plugin init. * N-Rage: Fix memory leak in GetN64ButtonArrayFromXAnalog and GetN64ButtonNameFromButtonCode Replaced dynamic allocations (new[]) with static buffers to prevent memory leaks. (commit: 9034bc6fdc8af37e2159a8e2ddab08233663e2e3)
Dev-4.0.0-6547-daa8dbc
21st February 2025
- core: make CX86RecompilerOps::SPECIAL_JALR handle 64bit PC (commit: fa57ce7fb8793957af3c177f39b5db57f05a37cd)
- core: fix up missing exception check in CX86RecompilerOps::SPECIAL_DIV (commit: 5d21bf80b9e4a354f50d74020739d4821c1736e5)
- Core: do not write back rt in CX86RecompilerOps::CompileLoadMemoryValue on exception (commit: 7eaf1c4ba342c9d3a6216cab672bc3ee73af1961)
- core: reset m_InstructionRegion on R4300iOp::ExecuteOps (commit: daa8dbc8336747284e52746158030530dea9ee58)
Dev-4.0.0-6543-5e029ec
13th February 2025
- Core: In R4300iOp::ExecuteOps only update UpdateInstructionMemory at the start of the loop (commit: 8ae9d7b9ffd655b777d7df3ed05ca4f586b99aea)
- Core: in CRecompiler::RecompilerMain_Lookup when TriggerAddressException has occured, update the PC before checking if valid (commit: a5a2c8cf6d8e3e4b03343b36d0031560116d56a0)
- Core: In CX86RecompilerOps::COP0_MT update the count register when writing to Count (commit: a07f6eaf90d64dd9c222f973f64df5b201495e16)
- Core: In CX86RecompilerOps::COP1_S_CVT, CX86RecompilerOps::CompileCheckFPUResult32 set softfloat_exceptionFlags to the FPU exception value (commit: 20f3e5e123e137be9fced08c776fe8f54132f456)
- Core: When syncing CPU make sure PC matches on 64bit address (commit: a82c11b8bbd0f92bd54dadf549c29b0b99de2a84)
- Core: In CX86RecompilerOps::CompileExit, make sure writing 64bit PC (commit: 1debcd1ca52d6686b2b9376cda1259eae11bb772)
- core: More work in making sure the Compiler sets 64bit PC (commit: 9d28d9cf2886b46b894532c5093dfdcfa5fd7a96)
- Core: In CX86RecompilerOps::SPECIAL_JR store PC as 64bit (commit: bd38e7f2d62335982b5bda6583080cbfeef1f37d)
- Core: CX86RecompilerOps::CompileLoadMemoryValue some work on it generating an exception from invalid load address (commit: 5e029ecf6a04249bb98c2038f1fad753a01e3729)
Dev-4.0.0-6534-b8a514a
6th February 2025
- core: Fix CPU % numbers (commit: 3a0c4f5da6c7e7f6d8649a92ede5ca58cf1491c6)
- RSP: Make sure HLE audio is on for x64 (commit: d918225639f9cf9588fb397de224fb9ab7163ca7)
- Core: Speed up some debugger usage in interepter if not being used (commit: 4a68941c085aa9bd29ba708046f348141edbb016)
- core: Create instruction region to update after a block (commit: b8a514a483b70f758f47b0ee78609c8175ca5e28)
Dev-4.0.0-6530-fd062a2
3rd February 2025
- Core: add edge condition test to DDIV in interpter (commit: 00a978ca1b3d2bd6db28edb310ed40389888edc8)
- Core: Convert interpter FPU ops to use softfloat (commit: fd062a288a4b65ab79f35b036eb5455713907273)
Dev-4.0.0-6528-4521389
26th January 2025
- Update Swedish.pj.Lang (#2456) (commit: 452138940420ea04dcc3769782186df4cf0ddbaf)
Dev-4.0.0-6527-ec6d933
16th January 2025
- Fix wrong initial texture and log directories (#2454) (commit: ec6d9336a6a0267cc512e5c02fcf06c67825fce1)
Dev-4.0.0-6526-5cd2f02
8th January 2025
- Fix wrong setting names in Project64.cfg for LogRomHeader and LogUnknown (#2452) (commit: 5cd2f0253b7e628301b935947b64f735e224bccb)
Dev-4.0.0-6525-c7d8a70
26th December 2024
- Core: fix jump in CX86RecompilerOps::CompileSystemCheck (commit: c7d8a70a4d5bb844f04de12d5bb9bb37e6d3fb26)
Dev-4.0.0-6524-f014691
26th December 2024
- Core: Add DwordLower for cvt.w (commit: fc79cb03442ad8c676872d264964c08b3057cbc6)
- Core: Fix up CX86RecompilerOps::COP1_D_Opcode for the registers it is using (commit: 3c7e71adca1fcd0b6c65f13db93c974a92852a49)
- Core: CX86RecompilerOps::COP1_D_Opcode fix return type of floating point register (commit: bfa378856204a45d74acb12dab56be9224419817)
- Common: Fix CPath::SelectFile (commit: f014691592e4452a8f04437456c027cd27948413)
Dev-4.0.0-6520-7e74b98
19th December 2024
- Core: Fix up bug in CX86RecompilerOps::SPECIAL_AND (commit: fba1c4bc3b50cb739cffaf18bcf94c9daebd35e8)
- Core: in CX86RecompilerOps::COP1_CT ignore write to other registers (commit: 13a974e687849a04cd20e2715ee55fab91cbe46b)
- core: better handling of fpu registers with COP1_S_Opcode (commit: 57f278416ea25b4fbb49b8e3676bb9225dd9d8e7)
- Core: Fix up labels in CX86RecompilerOps::COP1_S_CVT (commit: 7e74b98d5b2b30cad79c930962f041a4337462f8)
Dev-4.0.0-6516-473aeba
12th December 2024
- RSP: Add #include
to RSPInfo.cpp for 64bit (commit: b8ee9f87281df2d9b45e83800d00ea98e484841b) - Core: Better handling of Storing non 32bit values to non memory (commit: 5d64b3d92079879c39dcff6a315ef8be574e3dac)
- Core: Fix order of value in call to CMipsMemoryVM::SD_VAddr32 in recompiler (commit: 473aeba2cfee218eea8ec173b1c46548e5ef6741)
Dev-4.0.0-6513-3164caf
8th December 2024
- Core: allow Store/load ops be forced to 32bit version (commit: 3164caf2d02a9187795050c5ab1bc8baa45f6464)
Dev-4.0.0-6512-5a5ea92
6th December 2024
- fix resource issues (commit: 5a5ea92f3f88db4c3f6c591be5f49d961b670dd0)
Dev-4.0.0-6511-b9fe8e3
6th December 2024
- Fix compile issues (commit: b9fe8e3657c36876fb898d0f9b416ec8e4b94d13)
Dev-4.0.0-6510-8392ea5
6th December 2024
- Core fix up load states (commit: 8392ea5c0f4adb2d9c94d7dce0c0d6a295d2b375)
Dev-4.0.0-6509-a045a4f
6th December 2024
- Core: fix accidental changes to UIResources.rc (commit: a045a4fcd4bfc5347f4cb9ae8f108ad2f08231ef)
Dev-4.0.0-6508-c6b41da
5th December 2024
- Core: Fix up CX86RecompilerOps::SPECIAL_DADD (commit: 04c1c3d024cade7a1737a91a89acc3d527f63a8c)
- Core: Fix up CX86RecompilerOps::SPECIAL_DSUB when rd == rt (commit: 1e4ab0412140c81a93336acdac6348d806c0df79)
- Core: Do not allow CX86RecompilerOps::SPECIAL_DSRL32 and CX86RecompilerOps::SPECIAL_DSRA32 to write to R0 (commit: fc1210aac5d2a6ebaaf3a336a63fba2267898f21)
- Core: Fix a bug in CX86RecompilerOps::SPECIAL_DIV (commit: 77cd679756a7ee54cc60ff60cbec5bd6b3931f70)
- Add Overclock modifier to Defaults panel (commit: c6b41da92663b02ef07ab8ca8903118b699a185f)
Dev-4.0.0-6503-4366703
28th November 2024
- Try to fix appveyor.yml (commit: 4366703f287da772de1a01db020496b149b386b8)
Dev-4.0.0-6502-1f3ef6d
28th November 2024
- Core: Get Zip files to use utf16 paths (commit: 58a13b8e28440f45370afa42f011f980ebb0f357)
- Core: Zip load in CN64System::LoadState uses utf16 path (commit: 48b3e5a9a2861e50f92ab206ee6cb86dd3e16b24)
- Core: fix CX86RecompilerOps::CompileLoadMemoryValue Map_GPR_32bit when called from LWC1 (commit: 5e1a40fffb56f696cdbe84e53a7ba1ce8f2b0bbd)
- Core: When running as recompiler in 32bit mode, if LW/SW are in delay slots on block boundaries use 32bit interpter functions (commit: 315d5b9e669bd59d5272754a8645b35d9a5e47d9)
- core: if lwl or lwr, in CX86RecompilerOps::CompileLoadMemoryValue, make sure that we are loading rt (commit: fd05d9f42fe38e92a32ac30b18f22cb3707ee8af)
- Core: Better handling of SW with address not sign extended (commit: d5367d92914e00947f196755a085069bd1d2b134)
- Core: With CONST64 CX86RegInfo::WriteBackRegisters might not write the high 32bit correct (commit: 52d904702fe1cd23071800206f14544964e4ae8f)
- Core: CX86RecompilerOps::ADDIU should not ignore when not 32bit mapped (commit: 8d69671e93979aa8de2959a5ff406a9e670e3bbb)
- Core: Ignore write in CX86RecompilerOps::SPECIAL_OR (commit: 0de0bea07a8791bcd911efcd60198a386bb186b1)
- Core: Have CX86RecompilerOps::SPECIAL_AND unmap the register on const write (commit: a3c777ed8447ff5085fba0c6190fbd8378dea464)
- Core: Have CX86RecompilerOps::SPECIAL_XOR treat R0 as 64bit constant (commit: 95015302d691d12d55c10595e327cbb47cb56557)
- Core: CX86RecompilerOps::SPECIAL_NOR Ignore write to r0 (commit: 1f3ef6d50566eae0cbdd0d415c605b44ea91b4bf)
Dev-4.0.0-6490-2ec9ed0
14th November 2024
- Core: In jump ops, Only add label symbol if logging (commit: 61aa53f1a5d5998e93cfbbc3036c9d779c0165d7)
- Core: Fix up logging id for label symbols (commit: 944dd0917a40df8faf50a2f9623328865a5ca9b9)
- Core: Improve LW with address not sign extended test in recompiler (commit: 2ec9ed08a4db23cdc0668b79a691aeabd4cb9547)
Dev-4.0.0-6487-97b2579
7th November 2024
- Core: Fix up recompiler log including 0x in number symbols (commit: bfd181f33ed635405bc90b9a17b8111bc0184eb0)
- Core: CX86RecompilerOps::JAL stop double call to UpdateCounters (commit: d06212e766f3124fa22581ba25bb62b5c9801738)
- Core: in CX86Ops::_log better handle label symbols (commit: a46ac9f38d3d9b994aa0f60bb29293214963ac1f)
- Core: On ExitReason_CheckPCAlignment make sure CompileSystemCheck is called (commit: e419508c2b3d826bd05357ab365e78a9c97d3c10)
- Core: Normalize RomDatabase, VideoRDB, AudioRdb file paths (commit: 72e6ee1a2baf1ae46962e30a68d946e897237e5c)
- Core: Handle duplicate symbols in AddLabelSymbol (commit: f63244cfa4702b03a5bac723eb36b6631f0400b0)
- Core: Have the recompiler just deal with the Program Counter as 32bit (commit: 97b2579b4b13c3faa65c92000936101e08b06af3)
Dev-4.0.0-6480-f3a3d56
31st October 2024
- Core: Change the handling of symbols inside asmjit usage (commit: 905254615df34a60ba0571c48a368aec850b5706)
- Core: fix up clang formatting (commit: 24d5a6bd652ff2ff7fac81de94a78858887bd305)
- Core: Fix up default x64/Release config file (commit: 246934c0abfb381d5d4dfb551088e41498ac01bf)
- Gliden64: Fix up x64 build with including UI (commit: f3a3d56c138c592ea3367941fbed115ff85ae665)
Dev-4.0.0-6476-17c501f
24th October 2024
- Core: Have only one function to do what R4300iOp::ExecuteOps and R4300iOp::ExecuteCPU was doing (commit: 5750d3df800b33f956ce700f13441de5fde81e92)
- Core: In compiling a block be able to trace the time to compile (commit: 4a42466559e6b296c363e909942fec5860b0b93d)
- Core: If jumping to an unaligned address then generate an exception (commit: 65ede5e3e87322de74dae02d9799a7f122a10f64)
- Core: remove the BreakPoint in handling ExitReason_CheckPCAlignment (commit: 440894992a21d50cfbe53b7bc2fbb937673e5fa2)
- Core: Update Map_MemoryStack to pass gp by reference (commit: 885d31f2759c76a033b3497cf8dff22b562d3c5d)
- Core: log the block code to the asm log file (commit: a8c8e751fc45c588c36afb0163838bcdc32dfd34)
- Core: clean up some code related to CompileStoreMemoryValue, like the exit method being an exception (commit: 17c501fa0833815975494880c975ef604e063681)
Dev-4.0.0-6469-c39582b
17th October 2024
- Core: in SPECIAL_SYSCALL, SPECIAL_BREAK only exit the block is the stage is PIPELINE_STAGE_NORMAL (commit: 45e52e1d2a0628102725fc8795b50e93b4d8ace2)
- Core: Check recompiler memory based on the function size (commit: f708e5c0b28820820105b87536f074ecf533f63a)
- Core: Reset Memory Stack Pos In recompiler after running interpter code at non rdram location (commit: a38467cc19e043158e11c77aa94c280d1f38dbd3)
- Core: Make sure CX86RecompilerOps::SPECIAL_AND can not write to R0 (commit: c39582b9ed7cf6be7c2403076e82322ecd970333)
Dev-4.0.0-6465-ccf7087
10th October 2024
- Core: Fix up clang error (commit: ccf708751f89bc76e382040f6e1dcf407784e336)
Dev-4.0.0-6464-0d95a0c
10th October 2024
- Core: Normalize Plugin dir (commit: c176f61aacddc8707b370cd4bddeae0e85480615)
- Core: Handle paths with non-ASCII characters (commit: a2e479a705ccade4389ea09e8597d8495b7a8b6b)
- quick dirty possible fix for MBC5 roms of 4 and 8MB size. (#2442) (commit: 0d95a0cd7fba7de489a699b387c31c03268d362a)
Dev-4.0.0-6460-fc23fca
3rd October 2024
- [RDB]Set SGB Emulator to 8MB (#2440) since the defaults for rdram changed between 6058 and 6059, i had not accounted for this emulator rom actually needing 8MB (commit: fc23fca43ed4015b2faf19ea92481403c20408a8)
Dev-4.0.0-6459-edc54c4
3rd October 2024
- Fix spelling and clarity issues in CONTRIBUTING.md (#2438) * Fix spelling and clarity issues in CONTRIBUTING.md Reword in a few places for clarity without changing the original meaning. numbering (skipped from 5 to 7). * Update CONTRIBUTING.md Add newline to end of file (commit: edc54c425fad3bd68cf3c886c3e63e65595d16e0)
Dev-4.0.0-6458-30090e5
3rd October 2024
- Cote Update PeripheralInterfaceHandler::PI_DMA_WRITE to handle misaligned, end of page test (commit: 9e53b161a4a4b5f5755528b6d74df2a4d980f703)
- Core: in CX86Ops::CX86Ops set setLogger to nullptr if not logging (commit: 30090e5db752a01b1c1408cda6152a31742c6ae0)
Dev-4.0.0-6456-08e1b3b
26th September 2024
- fix up clang formatting (commit: 08e1b3b39bf76398a9c2fff1e0db3c03b2f39251)
Dev-4.0.0-6455-62bf10e
26th September 2024
- RSP: Make sure m_SyncSystem is valid before checking m_SyncSystem->m_BaseSystem on shutdown (commit: cd9fc5984adf9b88bf6058ddd35527413bcb11fc)
- Core: Normalize Path for RomList_RomListCache (commit: 544d6ba1b93882e462e4ff9988ab2a16091decd6)
- Core: Clean up RDRAM/RI Registers (commit: dc4fa211b05d10799ef67448b75b464b2c3fed83)
- Core: Have fpu ops check the input of fs and ft at the same time (commit: 62bf10e505f13238330a97e15194e97b4ba589d2)
Dev-4.0.0-6451-7cb0c25
19th September 2024
- RSP: Change RunInterpreterCPU to ExecuteOps (commit: df9b04bb5ba0a8dd3920deb3e445dd013c20423b)
- RSP: Move CompilePC into RspRecompilerCPU (commit: 3340c032c3c38ab752d30968e1c860655bbebe13)
- RSP: Be able to compile sections based off tasks (commit: c098a6a464b9b940bf9a442678e97713ba984e43)
- GLideN64: Slight clean up of project file (commit: 7cb0c258a192975af24bad2cb31aeae4cdd1f7f4)
Dev-4.0.0-6445-ea199c5
5th September 2024
- Update installer to have new binary path (commit: ea199c55469e2736f988dc2d01bbd6f125a509af)
Dev-4.0.0-6444-aaa6fc8
5th September 2024
- Gliden64: Add as a submodule (commit: 00a92871c05d5a64f31d5d8111bb5b9e7148277c)
- Core: Add $(Platform) to the output directory (commit: aaa6fc80825efe32b4ca2a0cdf41dc9d0a1de026)
Dev-4.0.0-6442-eb985de
29th August 2024
- RSP: change CRSPSystem::m_Recompiler from a pointer to a member and initialize it at creation of system (commit: 96080bfdd2b5d4615efd2ab8b7fd5e8193c48fea)
- RSP: Start to have a RSP Settings class (commit: 5eac2101971f7de860eb5f534071805d2a42867f)
- RSP: Start to add CPU style HLE (commit: eb985de132561d6a6571d296bc5af3a00530c650)
Dev-4.0.0-6439-2b79752
22nd August 2024
- RSP: have RSPRegisterHandlerPlugin as part of RSP System instead of a global (commit: d9ae43b69dac59658686daa22a4f98dbe11ffa55)
- RSP: Remove PrgCount as a global (commit: 29c49a20636b77e558fb2363120830a01331e8c0)
- RSP: Have NextInstruction and JumpTo members of RSP System instead of a global variable (commit: 2b7975280e7daf643ed01cf974854b5dc5040a81)
Dev-4.0.0-6436-4681f07
15th August 2024
- RSP: internalize RSP information in to interpter ops (commit: 6ed1c3edfb1e25315dc7c8fd3daebdf1d2dcba82)
- RSP: Move rdp logging in to it's own class (commit: 4681f07bf81b79b0a849c0708cc723f0783e4344)
Dev-4.0.0-6434-9f98f4d
8th August 2024
- RSP: Move compile functions into CRSPRecompilerOps (commit: 19240302660e79092cca91ab1b8ab53f051180a8)
- RSP: Create CRSPRegisters (commit: f7ab6089768a73df807e7f3521cceef87daad512)
- RSP: Create CRSPRecompiler (commit: 762d1b1566c72672ef699ee4326eb363c8da45cf)
- Rsp: Change RSPOpC to be a class member (commit: 9f98f4d4cd1ba38b2d90eef199314fc9fcfc6ffb)
Dev-4.0.0-6430-2904d36
1st August 2024
- RSP: Create RSP system class and move all interpter ops in to RSPOp class (commit: 2904d3641d8010ee2dc51ccb92df8126ba090d73)
Dev-4.0.0-6429-dab432e
20th July 2024
- RSP: Disable a lot of ops that are not functioning correctly in the recompiler (commit: 6816ff4435b92b3b53b51312070e139733a21d4f)
- RSP: Remove some unused functions and turn Reordering and Sections off by default (commit: 7c2655c544324f50198f5769b3659030bb621404)
- RSP: Fix up LSV in the recompiler (commit: 9d7b391487dae1c5df7cb7cf7e630b2c906c6328)
- RSP: clean up LDV (commit: dab432e7bd27a4fb97c08d6dc06a1042b18eb321)
Dev-4.0.0-6425-13fb8cd
12th July 2024
- RSP: Reset secondary buffer to start on ResetJumpTables (commit: 7b013c3deb776056186c3f22704e81c2625b9ce0)
- RSP: Handle lwu inside IsRegisterConstant (commit: e43d697476ebd292e1cffa3699cfd688f976ea11)
- RSP: have Compile_LW handle DMEM overflow better (commit: 6e4852fc789d6a19d9a3fa7bbc143ff16c036768)
- RSP: Have Compile_SW handle DMEM overflow better (commit: 8c6856f1c8d21eb586cb63637372a46af316eb89)
- RSP: in Compile_Opcode_SSV cheat the op instead of generating an unknown opcode (commit: 564926163ccf09d792099b406798ff0f388714dd)
- RSP: In Compile_Opcode_SQV Cheat the op instead of causing an unknown opcode (commit: 13fb8cd2da436c6d95fc1ef2097e18f4347cfa40)
Dev-4.0.0-6419-e2243fe
6th July 2024
- RSP: Set max log size as 300mb (commit: 1af8570315a88b8edc4e127013e5bce609d44dee)
- RSP: Compile_Cop2_MF check for write to r0 (commit: 38599b79febc327447a1abd56cb08808cfa4ebed)
- RSP: Clean up #ifdef in Recompiler (commit: 2a149beb69582e7757c0fa390eed422227cfefbd)
- RSP: Add Vector_VRNDN and fix up compile jump table (commit: 4125774be8245b7905272125a26ca46ae8c90ad1)
- RSP: Fix up recompiler jumps JAL, BLTZAL, BGEZAL (commit: 9b38977b31652f0e23c880fa3ac63ba721b820c5)
- RSP: Make sure RSP block ends with a ret (commit: e2243fe8ebe51d1596f1b77337b6bd0467be16f8)
Dev-4.0.0-6413-0e0f0f7
27th June 2024
- RSP: User crc32 for crc of imem (commit: 661ec98bb311f87b7e5e281175ebf06fd5baa9f3)
- RSP: DelaySlotAffectBranch should clamp PC (commit: 06eea03d7dd35ade53ed2faffdc2e4d5e707c926)
- RSP: JALR update rd after updating the PC (commit: 0e0f0f7618d72bea6b0c152fea76f456c97908bd)
Dev-4.0.0-6410-96a4c2c
20th June 2024
- RSP: Used the wrong reg for write to r0 check on some ops (commit: 96a4c2c926368fddc7c882c89cafce9a6cf4284e)
Dev-4.0.0-6409-abfb896
20th June 2024
- RSP: Handle writing to r0 better in recompiler (commit: 35aeeb6285bd52fb6d316589ca0386b86a96d771)
- RSP: Add Compile_Vector_Reserved (commit: 90c0beb01eef9f7436fa039dffe8c3f0a4f2b215)
- RSP: Add Compile_Vector_VRNDP, Compile_Vector_VMULQ, Compile_Opcode_LWV (commit: abfb89614269dd4d12f169e7b5146871f1312ebc)
Dev-4.0.0-6406-bb04240
13th June 2024
- Core: Remove Memory exception filer (commit: 73c9174ce9c1df4de9e3e1e2f8ce651d60f45880)
- RSP: Get Recompiler to use LWU (commit: d3411809f728dfcbc40d371d050be45cabd00b9f)
- RSP: Handle break in delay slot (commit: 7161a6f591876ac11fb00b2f6241964bb5f567db)
- RSP: Have the code be able to loop (commit: c3d6ed1a0ccfda7b9043bd0f0ef2c0d5eb8cf77d)
- RSP: Better handle delay slot at 0xFFC (commit: 303af24bdeb07681ad96c0eb546f6a33a9a11117)
- RSP: Add const to mmx and sse terms (commit: bb042406be05feb34432c05a65dcec6c4f1d44e4)
Dev-4.0.0-6400-65a9097
6th June 2024
- Core: Change the Program counter to be 64bit (commit: 91f9cdaaa7765af6e24ddb2be5ac87b930db3b0a)
- Fix implementation of quad3d for f3dex 0.95 on pj64 video plugin (#2427) * Update ucode01.cpp * Fix quad3d implementation for f3dex 0.95 * Fix compile (commit: 0761ad4a836ef418583e36b2dabf9f4edcaa8a32)
- Add TOC to the README and other improvements (#2424) * Add TOC * Added some extra things to the build instructions * Added a link to the build doc (commit: f1d0c49d73724c52880408c70c3d9e2805691964)
- Allowing a paste into a number field to be trimmed automatically (#2414) The specific issue I experienced is that Excel/LibreOffice Calc add a newline when you copy the contents of a single cell. This is bad behavior and they should provide a copy option that does not do that, but alas, it's much harder to get that into those applications. This behavior made it impossible to paste an otherwise-valid hex address into the Project64 fields without first putting it into Notepad, deleting the newline, recopying, and then doing the paste from there. If the field was simply text, you can go into the field edit and shift home to select all and then do a copy, but that does not work for a formula. When you edit the file, it shows the formula instead. Therefore, you have absolutely no way of working around this except pasting it somewhere else and removing the newline manually. In principle, there's no reason why you wouldn't trim the ends at least. Whitespace on either end is useless to you. However, content being after the newline should be rejected as it was before. There were two secondary issues in the pasting code that are fixed here: One is that it only sort of collapsed single spaces. So if you had more than one space, spaces still would have ended up in the result. Actually I think the semantics were slightly more insidious,
would have turned into effectively. The only thing it did was remove the space by duplicating the number. If you had two spaces, then it would have ended up with e.g. . The only case where this wouldn't have happened is a space at the end which would have been preserved in the paste. Secondly, it mutated the clipboard data directly. This would have lead to confusing results where multiple pastes would have had clipboard data in the clipboard itself move from, for example, two spaces to a single space to no spaces at all. The better solution is to preprocess to figure out how big we ultimately want our space-less result to be and stamp out the copy ourselves skipping anything we don't want. Leave the clipboard alone. If it's desired to preserve single spaces only in the middle, the code will need to be modified a bit. Co-authored-by: Summate
Dev-4.0.0-6396-77ac474
23rd May 2024
- Core: in CX86RecompilerOps::CompileCheckFPUResult64 protect RegPointer before Map_TempReg(asmjit::x86::eax) (commit: ec714cd90d8b694e0b3ca78023d2145150c9e861)
- Core: In R4300iOp::CheckFPUInput64 check values directly instead of using fpclassify (commit: 0ff0d5234c69803e8489e518e12677edebe41bac)
- Core: Make sure fpu stack is being cleared (commit: 77ac4744a5d17082dca95450ac35dbf308a7b3d5)
Dev-4.0.0-6393-3baaa82
16th May 2024
- Core: Sync FP status register in advanced block linking (commit: 13bd420b2ac2c04c29d51d4cbbff37eda86ee25b)
- Core: Add CX86RegInfo::GetFPStatusReg (commit: 7f18773b5ba63c6a574e84009572f602eaf3103e)
- Core: remove usage of g_RecompPos (commit: a1f46356fb9285806be0589b61a4d79a822b92ec)
- Core: Increase the minimal amount of free space in recompiler memory (commit: ae21e10a8d6273c4b72a8114cf60a40bf0980a2b)
- Core: Remove g_TLBLoadAddress, g_TLBStoreAddress global variables (commit: 3baaa829deac8589df69e93d50a101dec4e1df43)
Dev-4.0.0-6388-703a09d
9th May 2024
- Core: Clear FP Status flag in recompiler on BC1FL and BC1TL (commit: f478f162699b3cf8dd237f283e845343eafef510)
- RDB: Remove SMM-Protect as a setting being used (commit: b851689ceba0e28f1078299410ef223f27d2aaef)
- Core: Remove protecting memory option (commit: 703a09d034daa1cc77176080de5a58494e5d3684)
Dev-4.0.0-6385-4c23e7a
2nd May 2024
- Core: Have CX86RecompilerOps::COP1_S_CVT be able to handle the old format of FPU_Dword and FPU_Qword (commit: dd0f7ad776d3a9553468362690a9f84f96489876)
- Core: get COP1_S_TRUNC_L, COP1_S_CEIL_L, COP1_S_FLOOR_L, COP1_W_CVT_S, COP1_W_CVT_D, COP1_L_CVT_S, COP1_L_CVT_D to use COP1_S_CVT function (commit: b3e8b760e6e68d50bbc264bdfd0cb928c9fe31a6)
- Core: Force Fpu exception in recompiler (commit: c786bc3251f2acbb5696e6dd6641041700a3fa40)
- Core: Remove ChangeFPURegFormat, Load_FPR_ToTop (commit: 4c23e7af2cbff9c70c729ef80cb0125c515f280f)
Dev-4.0.0-6381-046f27c
25th April 2024
- Core: get to COP1_S_ROUND_L and COP1_S_CVT_L to use COP1_S_CVT (commit: b92e6bd75277e036ef94103ecd6c1fc64df3542c)
- Core: Get CompileCheckFPUInput check InvalidValueMax, InvalidMinValue in conv (commit: 627b4d6103b583a707e7e295f88d3e4e1ae9bf23)
- Core: fix up some bugs in CX86RecompilerOps::COP1_S_CVT (commit: 046f27ce98d0d35e3ea1e0939d090c94c04e8de5)
Dev-4.0.0-6378-d658477
18th April 2024
- Core: CX86RegInfo::UnMap_FPStatusReg should unprotect register before trying to free it (commit: 79f7aa99270210519e59c183d812bd9e589bbfa4)
- Core: CX86RegInfo::UnMap_X86reg should fail on a protected register (commit: 4071b52810b9b5115f98357dd525f724f55f9dcb)
- Core: CX86RecompilerOps::COP1_S_CMP should allocate eax before calling CompileInitFpuOperation (commit: fe87142657967b70b073496bbd000291c338e4a3)
- Core: Use the new COP1_S_CVT in COP1_D_ROUND_L, COP1_D_TRUNC_L, COP1_D_CEIL_L, COP1_D_FLOOR_L (commit: 9e73771815516e9cb5e13a33e8515fc2b37fd2d6)
- Core: Get COP1_D_CVT_L to use COP1_S_CVT (commit: 3203322d8bc4af82c3aa2211219ce353f4d7d0c9)
- Core: Get COP1_D_CMP to map eax before CompileInitFpuOperation (commit: a9875b7d617d952dcfe2533da3d3db262fe7df29)
- Core: Get CompileCheckFPUInput to better handle 64bit value check (commit: 7dc53e51cf334896152fcb2b9b6271cd7d9bf922)
- Core: get CX86RecompilerOps::COP1_S_CVT to handle NewFormat == CRegInfo::FPU_Qword (commit: 38738b783ddffc5863433cb56862df531d53be96)
- Core: get CX86RecompilerOps::SW_Const on 0x04300000 to call MIPSInterfaceHandler directly (commit: 1172b6e04dd3bf6efcda82870e748e8bf81f586b)
- Core: In CX86RegInfo::Map_TempReg allow it to use FPStatusReg if it is unprotected (commit: b313640831ff4152e1697f4622a30b7b2d67b097)
- Core: get CX86RecompilerOps::Compile_Branch to clear status flags (commit: d658477cf4ed49ca834c9d99229392d59660f14a)
Dev-4.0.0-6367-0cf4c7d
11th April 2024
- Core: refactor S opcodes to one central function (commit: 9272ac05f67e3e181dd45a306e0b7d760cea4eb4)
- Core: get COP1_D_CMP to work in recompiler (commit: 0cf4c7dc11dd4942b1f059cf95312d9d2e8c7e64)
Dev-4.0.0-6365-e7178db
28th March 2024
- Core: Have CX86RecompilerOps::CompileCheckFPUResult32 write to the high word (commit: 8bb2445263ccb5ca88fa14e5be17bd463d4f0ff3)
- Core: Fix CX86RecompilerOps::COP1_D_CVT_S (commit: e7178dbdec6e72d706ec0431cbbb9e04ccf6e2d5)
Dev-4.0.0-6363-560c49b
21st March 2024
- Core: create a function to handle .d recompiler opcodes that use fd and fs (commit: ece5e30a80f6d74031d5751b324c24c988f8bd86)
- Core: update CX86RecompilerOps::COP1_D_NEG (commit: 87c732b65de07712cc2cc78c19ea6500112b5e19)
- Core: Update CX86RecompilerOps::COP1_D_SQRT (commit: 772a20f07d056dd1722ee0e6634d73901b6a5d3a)
- Core: fix up CX86RecompilerOps::COP1_D_ROUND_W (commit: 401efae0d92bb46897331a349c3c5b786d8cbb03)
- Core: Update CX86RecompilerOps::COP1_D_CEIL_W (commit: 9a9c2e54392722f7b7f6541ca2d6edb231270b2e)
- Core: fix up CX86RecompilerOps::COP1_D_FLOOR_W (commit: 33d272284159b0b38f84424fc0a8e162956fcd7e)
- Core: Update CX86RecompilerOps::COP1_D_CVT_S and CX86RecompilerOps::COP1_D_CVT_W (commit: 2811b63ff08cc032fc2b6ba9ac03c3c073e5ba30)
- Core: In X86RecompilerOps::CompileCheckFPUResult64 make sure RegPointer is protected (commit: 45fb2ad9654e533df17cedb7de397a6435cda776)
- Core: Fix N64 disk IPL load address check (#2401) The IPL load address check always evaluated to false due operator. Signed-off-by: Francois Berder
Dev-4.0.0-6354-5133d47
14th March 2024
- Core: Make the FPU double ops to be modularized so it is a simple function call for an opcode (commit: 5133d47502563ff5ef66733a7036187eb00a3be2)
Dev-4.0.0-6353-10b41df
7th March 2024
- Core: Make sure precision is set to 53bit (commit: 97ec1f533b73e5e55fdd277f00eb2f78dd067463)
- Core: Get COP1_D_ADD, COP1_D_SUB, COP1_D_DIV, COP1_D_ABS, COP1_D_SQRT (commit: 98b1bddc641cb6854e290ab5342db8af654c7b97)
- Update Portuguese translation (#2412) (commit: 10b41dfef00e4c8f47105dcc2acfa60171cf4a1b)
Dev-4.0.0-6350-290040d
29th February 2024
- Core: Fix clang formatting in x86/x86RecompilerOps.cpp (commit: 190c408019b9337df6f279347f6abf9dbaed78f9)
Dev-4.0.0-6348-565d45d
29th February 2024
- Core: CRegisters::TriggerAddressException should only generate a TLB_MOD on writes (commit: 25dc3ed36ff617c4afbacddbd03102f5d38e0375)
- Core: Fix up CX86RecompilerOps::COP1_D_MUL so it can work with exceptions (commit: f7aa6ef6cb803e8ab0e6a45e1bae59589813228b)
- Cheat (#2410) * Update The Legend of Zelda - Majora's Mask (E) (M4) (V1.0).cht Added Time control cheat * Update The Legend of Zelda - Majora's Mask (E) (M4) (V1.1).cht Added Time control * Update The Legend of Zelda - Majora's Mask (U).cht Added Time control cheat * Update The Legend of Zelda - Majora's Mask - Collector's Edition (E) (GC Version).cht Added Time control cheat * Update The Legend of Zelda - Majora's Mask - Collector's Edition (U) (GC).cht Added Time control cheat * Update Zelda no Densetsu - Mujura no Kamen (J) (V1.0).cht Added Time control cheat * Update Zelda no Densetsu - Mujura no Kamen (J) (V1.1).cht Added Time control cheat * Update Zelda no Densetsu - Mujura no Kamen - Zelda Collection Version (J) (GC).cht Added Time control cheat (commit: 1bde8589e95478a7e82bfa67e84c3face0802e1b)
- Update minimum requirements for Project64 (#2409) * Fix typo in support window * Fix the typo for real * Update minimum requirements * Change minimum to supported (commit: 565d45de8a3ff7eaead2b9f648c194c1bea324e1)
Dev-4.0.0-6344-d2649f7
22nd February 2024
- Core: Have CX86RegInfo::Map_TempReg generate a BreakPoint if it mapping a protected register (commit: fae0b81e21505d3f0f4527686790e8982cd79f84)
- Core: Some clean up recompiler ops (commit: d2649f7a13af686c9dbb3889522f3f988c9afa37)
Dev-4.0.0-6342-e082cd5
15th February 2024
- Core: get CompileCheckFPUInput to be able to handle 32bit and 64bit (commit: 46f6fae40f38b47264dbdc31c49e2f8e45d5f06f)
- Core: Make sure CX86RecompilerOps::CompileInitFpuOperation clears flag for FE_INVALID (commit: 2559d2359228269a5a54723ca5726ce76519dd5a)
- Core: Get COP1_D_TRUNC_W to work in recompiler (commit: e082cd55df4eb59dc557969203795c694d5a8fa8)
Dev-4.0.0-6339-2014237
8th February 2024
- Core: Update Round.w.s, trunc.w.s, ceil.w.s, floor.w.s to work with exceptions in the recompiler (commit: 2014237ed6cb6674ef311b9957cb206a3114b041)
Dev-4.0.0-6338-ad1a2a2
1st February 2024
- Core: Update abs.s for recompiler (commit: b6671adf5da0dcfa405765f21ccd0cd5216dc2bf)
- Core: Update neg.s for the recompiler (commit: ad1a2a2d9a8a4d25e7320741410268a6bcd8dc5b)
Dev-4.0.0-6336-bc3fe0f
25th January 2024
- Core: Make mov.s the same as mov.d (commit: f0f44c67f4dde20fdff955b73a904cffafaa1978)
- Core: check timer on cop1 unusable (commit: 272144dc377ea83e8e5cffc90020013e40d1968a)
- Core: Fix up mov.s and mov.d for correct behaviour in the recompiler (commit: 7707f9c7b2dd373f2993a30e152dd13fcbfcc642)
- Core: Handle FP Status Reg being mapped better (commit: bc3fe0fe160dd6fb731786021f8c5f505af7b558)
Dev-4.0.0-6332-7ed94b6
18th January 2024
- Core: Remove usage of fpclassify from R4300iOp::CheckFPUResult64 (commit: 2231e8d6c0533cee0e85aaa90c695f117f6180d7)
- Core: Get CX86RecompilerOps::COP1_S_CVT_D to be able to work with exceptions (commit: 7ed94b653e451ccfb11c99962d22a540cdffccf2)
Dev-4.0.0-6330-71067cc
11th January 2024
- RSP: Update the size of the skip in the length for DMA (commit: 5c56f9df833b775c19150630ca59f1bcc43227ae)
- Rsp: Change how SP_SEMAPHORE_REG to how it use to be before adding multithread RSP (commit: 71067ccdc4194ff6993134632d04a88363fb3757)
Dev-4.0.0-6328-4dc3e35
4th January 2024
- Core: CX86Ops::OrConstToVariable should be a dword_ptr not a word_ptr (commit: 320769d9919039a0c2bde89d254dd5a6d5987cc0)
- Core: CX86RegInfo::FPRValuePointer when the format is FPU_Dword it should be using m_FPR_UW (commit: 91a8a828d78bd60551aff0f62b6a842abbbbb08d)
- Core: Add x86 asm opcode Jnp (commit: 23cff4d7c51ca9f7851a337c92cb229fa49e09fb)
- Core: Add being able to get FPU_FloatLow from CX86RegInfo::FPRValuePointer (commit: 0998f0ff0e8a7f262136911d6a5aa19104e43cb8)
- Core: CX86RecompilerOps::COP1_CF should be able use the mapped FPStatusReg if is mapped (commit: c9d2bbd221c3083d2abaecb18ecae76c6a11275c)
- Core: Get CX86RecompilerOps::COP1_S_CMP to work with exceptions (commit: 6ca8333d39de7a5a3d580588ba9213fe3b799632)
- Core: update Format_Name to match FPU_STATE (commit: 552b8f744a4f2210b1126c2cdfa8bab4155c9bbc)
- Core: Unmap FPU_Float with writing to m_FPR_UDW (commit: f8089f565e107c810104880bd82bf93146b81aff)
- Core: Update CX86RecompilerOps::COP1_S_SQRT to work with fpu exceptions (commit: 4dc3e35bb45f3a0efe1e9f0ccf2589ef3462bb3c)
Dev-4.0.0-6319-dafa1fb
28th December 2023
- Core: Get COP1_S_CVT_W to handle inexact (commit: e2306e3541b53b65af6b689f42944ab83674cb85)
- Core: Reset pipeline in CX86RecompilerOps::CompileCheckFPUResult32 (commit: 17288c90c01b821ed7f2f05eb94d4c74904be574)
- Core: Have COP1_W_CVT_S handle the initialization of exceptions (commit: dafa1fb24d50e4e8de09fe14a98696a4f71f4c1b)
Dev-4.0.0-6316-8399fdb
21st December 2023
- Core: Have R4300iInstruction::WritesGPR return the register written to instead of passing a variable by reference (commit: 8e3fb3e3029a3f21a6de92a5e9af751a4dd92784)
- Core: Have R4300iInstruction in CRecompilerOpsBase (commit: 6610ae30583d8d066fb588186798b5ca67e61280)
- Core: fix up some of the commented out debugging code in CX86RecompilerOps::PreCompileOpcode (commit: 2c1610cfe2a10a4e362a3a5f7649d389fb0e9443)
- Core: Handle unaligned CX86RecompilerOps::CompileLoadMemoryValue for 64bit ops (commit: 1810bfda5c732081bc7166d66b2fefaab4cb6acf)
- Core: In CX86RecompilerOps::CompileLoadMemoryValue instead of checking write to rt being 0 instead use WritesGPR() since LDC1 F0 rt is 0 but it is not writing to r0 (commit: b263ee10b0756f5f1d848e65a8af4b38c267caf7)
- Core: CompileCheckFPUInput32 and CompileCheckFPUResult32 should not be updating esp since using callthis (commit: 8e54ec8c8e5be5c43cc46f579ba44a9dcf4fc410)
- Core: Implement COP1_S_DIV with fpu exceptions (commit: d14a639a6247ad6821259cc27a634c9eebe91190)
- Core: Clear the Divide-by-zero flag (commit: 8399fdb893cfea157105fe645f69c9e7ed9fb906)
Dev-4.0.0-6308-c8e73ba
14th December 2023
- Core: Have UpdateSyncCPU use its Sync cpu instead of passing a cpu to it (commit: c67f3f0e977225f2a1f6b075be87633781a4dba8)
- Core: remove the global of g_TLB (commit: 5fec3f8d314788eba147dc1940d6ae86b20ce48e)
- Core: Have Store Instruc rdb and user rdb matching (commit: d5a5f4cdaca4dded46cc4affd518a0bd9ad54ed7)
- Core: in LL for recompiler handle storing the address in COP[17] (commit: 67f5e4f85426e46b3fcf76d47b60bf0f00e85f17)
- Core: Add RecordLLAddress for 32bit register pointer (commit: 89a6eaf9d1743f8fa4204e781a183dbb791d25db)
- Core: Allow LW to R0 be able to generate an exception (commit: 972943cff71396dbaeec0381e890a12258b5368e)
- Core: Handle unaligned SW exception in the recompiler (commit: c8e73ba18ed776f2d800413e60fc5ed1e1d142ac)
Dev-4.0.0-6301-236d618
7th December 2023
- Android: Start to get controller working (commit: 10b550bb63b8dfa38a9ecdce7e359713a9cf1a3b)
- Core: Fix bug in not creating save state correctly (commit: 15175d3fe25a642c5fee32229153dc96f876f0e6)
- Artwork: Add Project64 logo (commit: 236d618c20b74ee02a29fe3ba5895d69f6288851)
Dev-4.0.0-6298-de1288b
30th November 2023
- Android: Update how Addu cause android studio was not sign extending result (commit: 5671f2b7591e74d33bff010cc8568efea90c484c)
- Android: Remove unneeded log call (commit: df56964c96a6ab49e23f61de84222d82a216e7fb)
- Core: remove try/catch around Interpreter cpu (commit: de1288bdcad7d4cf42d0b86b3f77b6f6e8b35715)
Dev-4.0.0-6295-da09254
30th November 2023
- Android: switch icons from png to svg (commit: d0445eb5cc0775bc08452dbe19b2b97129f06132)
- Android: Add requestLegacyExternalStorage (commit: da092545e6e3ddb9f969759cd5c5afd0af9ad3ff)
Dev-4.0.0-6291-ceaa05c
23rd November 2023
- Core: Change TriggerAddressException to SetVPN an R of entry hi in one call (commit: 01673dac8d9a06b5159221a9379844fd659611b4)
- Android: Change how PACKAGE_DIRECTORY is retrieved (commit: ceaa05c317596afcb9526fe9049be230d0322508)
Dev-4.0.0-6289-d47b49d
16th November 2023
- Core: Fix clang issue (commit: d47b49d4b57a1f283bec22334299563320427f33)
Dev-4.0.0-6288-542afc4
16th November 2023
- Core: Convert %I64U to %llx (commit: a0130ff89648806c7e04b2098cac66082e85e421)
- Core: Have entryHI use functions to set/get parts (commit: dcb69690677a7385b637d974d46c2275bc511700)
- Core: Get Fast tlb to just be 32bit (commit: 8f4f4348209b60da317b6df7841a46ddfefcc36a)
- Core: On unmap base addresses reset to the correct address (commit: ee714e2462163d2427e7476468682a1146182797)
- Core: remove some accidental added debug code (commit: 542afc4514aa0dbbcff76b3bbe9c2ff847cb2816)
Dev-4.0.0-6283-e46ffde
9th November 2023
- fix clang formatting (commit: e46ffde6b32940bf88ac24aed5b813044f024515)
Dev-4.0.0-6282-296b7cf
9th November 2023
- Android: Get RSP core to compile on android (commit: 0c8b10bbc759955a259e2e5bd4f94eb1bd23af25)
- Android: Force RSP to be interpret (commit: 296b7cf1cf09caf67609cd506cf795eb2def025b)
Dev-4.0.0-6277-9b672cf
26th October 2023
- Fix clang formatting (commit: e6edbc6c82667553e689bb7993370f47d4dec121)
Dev-4.0.0-6275-ab52c4a
26th October 2023
- [Android] Add Android/Bridge to clang checking (commit: bf480623bde737b2d7ce6dc3ab384b9cd9f59d03)
- Android: Get rid of usage of project64_data directory (commit: a2c4e06f900cd54134a4a3f8d4108a7589b0ddb6)
- Android: Show base dir to splash logs when starting (commit: b74e21d056ea69579b23af2bc9d21fb956d6973a)
- Android: When listing a rom not in rdb, use game file instead (commit: d3f41327707b38430eb76e60288e5c07e99af0fd)
- Android: Fix up showing menu (commit: 0dc1fa7f45d755fdb811a7dd6f7e833743fbe2c2)
- Core: Get system events to be internal not global (commit: 4770d29ec0f7df06bc933c710127460ebfaec275)
- Mario 64 Shindou and Improvement hack support (#2392) * Update Project64.rdb Mario 64 Shindou and Improvement hack support * Fixed weirdly indented Jet Force Gemini goodname How long was this like this...... (commit: ab52c4ab57aad0ef6fcb7554bb56cac33e298f36)
Dev-4.0.0-6268-ebdef8b
19th October 2023
- Android: remove InterpreterCPU.cpp from CMakeLists.txt (commit: ebdef8bbdba166298552d84102ec72d7ade14823)
Dev-4.0.0-6267-8f06297
19th October 2023
- Core: move CInterpreterCPU into R4300iOp (commit: d3edbf6dda66b2e96149c8f5ab41ad38eb848b89)
- Core: Make R4300iOp::ExecuteCPU() and R4300iOp::ExecuteOps(int32_t Cycles) non static (commit: 7f42f70283eb370a641f9a6357e7bbb739bed6df)
- Core: Make R4300iOp opcodes not static (commit: ae0097550ffa7bb1e0207d56a3845a196b1de6c7)
- Core: In R4300iOp have a member variable for system, reg, mmu (commit: 4d78f56aa27c5df05c4cf8a00f008fafb6f20350)
- Core: R4300iOp access the registers directly, not through CSystemRegisters (commit: d58168bcb932bc4ee30dc9090e904cae929cfe06)
- Core: Remove SystemRegisters (commit: d6a2ae80c1405b265877db5b6cdc7a0240428c5b)
- Core: improve DisplayControlRegHandler::Write32 (commit: 8f062975c3f2c3e667708562e06e7206f044f8ff)
Dev-4.0.0-6260-d4dbc5a
14th October 2023
- Core: Have R4300iOp::COP1_D_SQRT inline asm version to only compile in Visual Studio (commit: d4dbc5a3f46583d060eced3b5abba65ebcb16ec4)
Dev-4.0.0-6259-00c5057
12th October 2023
- Core: Make sure precision is correct for COP1_D_SQRT (commit: 00c5057b17733c13865e50cdfdc79377f3b42299)
Dev-4.0.0-6258-3a68d3d
12th October 2023
- Core: Fix up FPU mode register location (commit: 4e71221147ffcd31d1a133b59fc093d9842b4c87)
- Core: Add masking around DPC_START_REG/DPC_END_REG (commit: a6405cfa2dba94cf43991fed07788f1804e64da1)
- Core: LL/LLD store address (commit: 3a68d3d92a78bb17118e92035ca37adac2529bce)
Dev-4.0.0-6255-befa579
5th October 2023
- Core: Fix clang compile issues (commit: befa57924dbb0c055e27669dcd94c1c7a1bd7f16)
Dev-4.0.0-6254-f73c370
5th October 2023
- Core: Change Non memory load/store to not use tlb (commit: b7311cc611499c21389c77c9cfa6ebc1dd1c2831)
- Core: Remove CRegisters::DoTLBReadMiss and CRegisters::DoTLBWriteMiss (commit: 35105e814e5be14dfe3590215a548b265dc00276)
- Core: Have save states handle COP0/TLB being 64bit now Core: Clean up tlb class (commit: 4b844495b7659ff41aa0133e92689f867c19bc2f)
- Core: Get tlb addresses to be 64bit (commit: 9f07fe2aaca196178871d99fd1acbf9c4634eaee)
- Core: Have load/store ops be able to use 64bit addresses (commit: e74e8f6a231934f0f453dd58f96e0935a834de31)
- Core: Fix up tlb Probe and call EXC_MOD when tlb is not dirty (commit: f73c3708a5b3113f52636fc1921b3a84acca678c)
Dev-4.0.0-6248-a975af0
28th September 2023
- Rsp: only use alignas for Visual Studio (commit: a975af0e3cf7ea2d0314b855a716621c34cbc425)
Dev-4.0.0-6247-dd7ec63
28th September 2023
- Rsp: Change usage of alignas to try and fix android build (commit: dd7ec63dd9c42897b527bb5347e0767dbb5c2806)
Dev-4.0.0-6246-7e249d2
28th September 2023
- Try to fix android build (commit: 7e249d22b11c42b864fdcb28e4a6d1168fd4000e)
Dev-4.0.0-6245-46e6e54
28th September 2023
[LIST]
Core: Update pipeline before sync in CX86RecompilerOps::OverflowDelaySlot (commit: 03e13455f96a42a140ad51426959ed9de10e2435)
Core: Create a handler for RSP registers that is accessible to the core and the RSP (commit: f817becf9c93277bb2abdd6d2d1c785f911e0937)
Core: reset run event in CRSP_Plugin after rom close (commit: 99417fc5d90077637864abe4fe882b077a5f2b1e)
Core: Create a setting for RDRAM Size that plugins can read (commit: bd1ec4ff0f891a8897e07e9278b69b36dd0f0e32)
Rsp: Use RSP Register Handler (commit: ac3e0f83d131a41087e1ea07c18a3d5df62920ce)
[*]RSP: move Enter_RSP_Register_Window
Dev-4.0.0-6235-2caa457
22nd September 2023
- Core: reset pipeline stage after CompileLoadMemoryValue and CompileStoreMemoryValue Update counter before mfc0 x, count (commit: 2caa457d0261dc00370cf91e0c261b441f66dcc3)
Dev-4.0.0-6234-10d2b77
21st September 2023
- Core: Try to fix android build (commit: 10d2b77d7c4ffe9a05ace874b6110575ed62b5fa)
Dev-4.0.0-6233-aadcca7
21st September 2023
- Core: Fix clang issue (commit: aadcca7528feb2fe5a41ad34e553a3441e6f0f4d)
Dev-4.0.0-6232-6307888
21st September 2023
- Core: fix up exception generator functions (commit: 6307888be4d133b35d6a86ce405491d0699f238e)
Dev-4.0.0-6231-32ff820
21st September 2023
- Core: Update
- RSP: Setup option to run in a thread (commit: 42a944c660d9e4218e0850aeb056df4bb9571212)
- Rsp: Move InitilizeRSPRegisters and InitilizeRSP into rsp-core (commit: 5dcc7e200fc0cdd319958412c2ce46d11bfda2d0)
- RSP: Clean up store vector ops (SHV, SFV, STV, SWV) (commit: bdaf8cf78ccbc8671e31862e8b1fe2a46a279f84)
- RSP: Fix up load ops (LUV, LHV, LFV, LTV) (commit: 174e751a4a28aa58ede41f382305a1f3deb079b1)
- RSP: Clean up vector ops (VADD, VSUB, VABS, VSUBC, VMRG, VAND, VNAND, VOR, VNOR, VXOR, VNXOR) (commit: dc95d2f7a476d97b3187dc32b5f1643a4522a6a4)
- RSP: clean up vector compare ops (VLT, VEQ, VNE, VGE, VCH) (commit: 32ff820a03a4c8659f7c6c73ad157476f51939f8)
Dev-4.0.0-6224-f3d6d3f
14th September 2023
- Core: DisplayControlRegHandler::Read32 read more of the registers (commit: 9ffd87168a74a5ed6a884634bc65d2edc36d83bf)
- Core: Change COP0 Status register to a struct breaking up the bits (commit: fcd7257adc7dcf62128c6455adfed9bb42b71df0)
- Core: Have CRegisters::DoTLBReadMiss set the target pipe line to jump, not directly modify the PC (commit: 5da5dab3c5a755bd47a81de27e62dcd38e9ec6c1)
- Core: Add calls to CPO1_UNIMPLEMENTED_OP for Cop1.w functions (commit: 2d09178449a4548c97ef7b449edef25e14875d82)
- Core: Have CRegisters::DoAddressError to not directly modify program counter (commit: a5a4873e84e330ba1923335399502e7fd3e82cca)
- Core: Move InitRegisters to register class (commit: 8b14b6d7d115035d35dfc29f361ded4abfeb1e8b)
- Core: replace GenerateTLBReadException and void GenerateTLBWriteException with CRegisters::DoTLBReadMiss/CRegisters::DoTLBWriteMiss (commit: ae4af8746bc76ca1019d5f805f2af487ec90fd9a)
- Core: Get CRegisters::DoAddressError, CRegisters::DoTLBReadMiss, CRegisters::DoTLBWriteMiss to use TriggerException function (commit: f559aed2ad28b97489dab85ab90a52a804d78d2c)
- Core: Add LLD opcode (commit: c02858c7a0692994aa7b7249c0b7b49fd5322338)
- Core: Fix clang issue (commit: e0c125e8370a32e47c20f0a191a4d6a362acbd47)
- Core: for tlb miss only use special address when address is not defined (commit: f3d6d3fc7c5bd6ae759237d82e03532a2ac5f7ca)
Dev-4.0.0-6213-002f2e1
7th September 2023
- Core: let the stack pointer equal end of rdram (commit: ab03916a709f2ee14705c0366775372f30e4629d)
- Rsp: Update display of vector in debugger (commit: 4f74dc4bb0680ea023e3345bfcd5560c3b6c7a0f)
- RSP: Update the display of RSP opcodes in debugger (commit: ab67374c8a308b708e0d2b7ac0d7fafc9864a881)
- RSP: Add RSP_Vector_Reserved (commit: 8b71ef3bc135c2f94e0137e8970a473a25ad935c)
- Rsp: add vnop for vnull (commit: d468b863c2c3d30aab1df081aeba062b4ec7814c)
- RSP: Add Vmulq (commit: af1c0c2b559bb35082be176e10aa7f983aaafd7c)
- RSP: Add clamp16 (commit: 0cadbe0f70898eae94e35cd498f5a6d5c3d16941)
- RSP: Add RSP_Vector_VRNDP (commit: 4e9a692449ba64e0bd2de1e52dee58d47fd8a3a4)
- RSP: Clean up code for vector multiple ops (commit: 002f2e17c3c8d4b237e4b0dc8d0b88beeb92b77f)
Dev-4.0.0-6204-7199096
31st August 2023
- Core: use m_TLB_WriteMap not m_TLB_ReadMap for NonMemory (commit: 41fa1fd5dd64a7b4dadc5b700ebc797113cad14d)
- PluginRSP: declare windows.h before asset.h (commit: 703ad4049ad07805e000cbfd9156a02ba83a24d1)
- Core: Add exit reason exception (commit: e49438cdab6c94ae9371c908eb0b933113b266b4)
- Core: Do not force unmapping of fpr registers before CX86RegInfo::BeforeCallDirect(void) (commit: 2dcfcf250d425a79f359aa829227915ed0568454)
- Core: some code clean up of Load_FPR_ToTop (commit: 416c85ecda81a93a601ef31e9da84dacf3edbd4e)
- Core: Add fpu exceptions to COP1_S_ADD (commit: c28c6bb4a16c8709464312fb30bff91a983bdf07)
- Core: Add exception to COP1_S_SUB (commit: 2f7a35613f1be65b1ca398da0558536c8749f7a4)
- Core: Add fpu exceptions to COP1_S_MUL (commit: 91d1c6e2378c339885762679c22a273965cbb5b0)
- Core: Merge CheckFPUException into CheckFPUResult64 (commit: 71990967488297934b040b2325734726eadfbb09)
Dev-4.0.0-6195-625f532
24th August 2023
- RSP: Remove flag to swap vector register endian (commit: 0cb43e0c3337d557e6a3ac0887e8d53d61e92621)
- RSP: Add class to wrap around RSP flag (commit: 9dab3481aea936010a0bab139f27f8525412a9f8)
- RSP: Clean up VCL (commit: 7db58769270f66f902d5aa4a1f87320ca4a18f56)
- RSP: Clean up VCR (commit: ae9912b0684d1fee9206afa3943f37afc89634ce)
- RSP: Set RSP_JumpTo before register in JALR, BLTZAL, BGEZAL (commit: 47f14016e613a2837a484eabd2097a2a0b4f9acd)
- RSP: use __debugbreak not DebugBreak (commit: 625f532d732da3ac6caaf504c7f6cdf83c6e538e)
Dev-4.0.0-6189-b8fff5d
19th August 2023
- Corrects Internal names for many Japanese roms (#2384) And adds missing settings for Majora's mask M4 Debug (commit: b8fff5d11675934eecf970f87c5c6a4f1076e697)
Dev-4.0.0-6188-d300dc0
17th August 2023
- Rsp: Move Recompiler in to rsp-core (commit: 6b30c1ae6ac14145d3228a85e0f319ef89514256)
- Rsp: Fix memory allocation of recompiler memory (commit: 09ef426ac6af0af148fa7ad0b241508b9ea77510)
- Rsp: Add a rsp AccurateEmulation flag for new rsp work (commit: 54be4d813511b5d8698361823bf5d69d80e3857c)
- RSP: Fix up AccurateEmulation for interpreter (commit: 3394be733f2b8897ef38a7760a7140c475272fcc)
- RSP: fix up usage of Indx in recompiler (commit: a80860605dcf9c9f508b235dbd469600d7126cc1)
- Core: fix up how recompiler handles rounding (commit: 6884c8d2c931c8b2c730800fd507a9c8c6b39864)
- Core: remove exception catch around RSP (commit: d300dc002aba3d78040f73add4f16808d70006af)
Dev-4.0.0-6181-1f0151e
10th August 2023
- RSP: fix up clang formatting (commit: 1f0151e06703ba5cad3b8433b37af45779464468)
Dev-4.0.0-6180-6bdc898
10th August 2023
- RSP: Change RSP Registers to be an enum not define (commit: bb5a16aaa2c04f2291b7619dbc8092ac8f7aa506)
- RSP: Start to split out RSP in to core and UI for plugin (commit: 25e48405c526ceb0316e885275e19f76f4b5b469)
- RSP: Move more functionality in to rsp-core (commit: 60192a7f33f2621b7aced401fce383dff0a9b163)
- RSP: use std::min for length calculation (commit: 1d492262fd74cde6994635cef5bafb198519a7d3)
- RSP: fix LDV (commit: c6c0a4a6d22292e0e1d336d2da3df13d2068e318)
- RSP: fix LPV (commit: 6bdc89824873e3681f0b6936e5c8515167e159bd)
Dev-4.0.0-6174-34d7578
3rd August 2023
- Core: Move TriggerException(EXC_FPE) into R4300iOp::CheckFPUInput32 (commit: 930e463bbc400c0cdb636844b7ee79ff4414334c)
- Core: get CheckFPUInput32Conv to return true on exception (commit: bc1b027c94ba0d894ee4a1e192890d4b303223ab)
- Core: Get R4300iOp::CheckFPUInput64 to return true on exception (commit: 5ff45c43c498f30e4d497b859eb757bcb47e19fa)
- Core: Get CheckFPUInput64Conv to return true on exception (commit: b5db44c12d61aad7b3aa6198c1ed1eed008d50a0)
- Rsp: Update vmov (commit: 05cd3a846b781922725ccd9e9fb5003db2384a74)
- Rsp: Change the order of EleSpec (commit: a18f78679e976e91368aa19c4ae9f643ea3b3739)
- Rsp: Update the element order in LSV, LLV, LRV (commit: 34d75780bf61c029074132536088850d6b0dec60)
Dev-4.0.0-6167-822b75c
27th July 2023
- changes this callback back to BOOL so it works again. (#2378) (commit: 822b75c734a5e4ae5723a576ccc952266ee37a12)
Dev-4.0.0-6166-bbe603c
27th July 2023
- RSP: Inline memory functions in to the opcodes (commit: e1854e15895dbc7da4208c82a4638999671dc2f2)
- RSP: Some clean up to lqv (commit: 52e77bc4e0009f8832ff5a8249f3334b9fc83408)
- RSP: fix up lbv (commit: bbe603c7589ed3154c8a09d0c4cabf065aa7059a)
Dev-4.0.0-6163-562d4d4
27th July 2023
- Make the FPU Register Caching checkbox functional (#2377) Adds missing line from SettingsPage-Game-Recompiler.h SettingsPage-Game-Recompiler.cpp to Game_FPURegCache Language file entry. (commit: 562d4d4e5640c8479db8fbfcf5dc76a37270d165)
Dev-4.0.0-6162-5c65beb
20th July 2023
- RSP: Change the name of the opcode that register ops use (commit: ee452143fff3662fc1d01c4dea5ccbfb884f7caa)
- RSP: A little clean up of VABS (commit: 97fbbffee8ba9cc3adcba2e74c89f61569e97062)
- RSP: Change EleSpec to be 16 and use .e instead of rs (commit: 97fccb1c364afddac506418d5d10b336fe65478f)
- RSP: Add method to get element specifier index from the Vector (commit: 6e03d6ad7bb1e08ff9eae0d14b9b359ecfa30f32)
- RSP: fix vmov (commit: bd357c65b093eb9808f7eb7909830bbccc17ba3e)
- RSP: Add lwu (commit: 4265bdfb436575f7a492b0c729a9860d0a6c6a6a)
- RSP: Update RSP_LRV_DMEM (commit: cf7628cc1dbbadba2bd93d5d86a6b9ac6d5db473)
- RSP Add dummy LWV (commit: e88e827d642b4f5151d778aca845f867f7fd6506)
- RSP: Add dummy vsut (commit: 2cf740565e0993ba2400b19f489fe64b12d30660)
- RSP: Update VAdd code (SQV/LQV order changed as well) (commit: 5c65bebe9e796cac95764dfc1329182d6915097a)